Xpresso (2)

by Mithrandir

Some few more hours of work and now we have the wires. The proof oc concept is ready, now it is time to start writing the project’s specifications in full.

This is how I got the wires between the gates. Haskell is way too powerfull. At first, I believed that this code will only help draw some wires but in reality it managed to draw all of them.

getMidWires :: Int -> Int -> [GateLevel] -> [(Point, Point)]
getMidWires ww hw l = build gateInputs gateOutputs
   where
     grep = getGateRepresentation ww hw l
     gateInputs = concat . map inputs $ grep
     gateOutputs = iw ++ (map outputs $ grep)
     iw = zip (getLevel0 l) (map snd (getInputWires ww hw l))
     build [] outp = []
     build (inp:inps) outp = (snd inp, snd ind) : (build inps outp)
       where
         ind = head (dropWhile f outp)
         f outg = (fst outg) /= (fst inp)

Here’s the result.

E = (a^c)bd ^ (a + bd(a+c))

E = (a^c)bd ^ (a + bd(a+c))

It can be easily seen that the rendering is far from perfect. But, I still have time to solve it. It will be done during this summer. :)

Also, I do have to reogranize the code. It is allready messy. :)

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