VHDL Makefile

Here is a short example for the Makefile I’m currently using to compile and test my VHDL project:

.PHONY: all clean testbench
 
VCDFILE = tmp
STOPTIME = 42ns
DEBUG = --vcd=$(VCDFILE) --stop-time=$(STOPTIME)
CLEANUP = rm -f $(VCDFILE)
OBJS = clock.o
TARGET =
 
all:
        make test
 
clean:
        ghdl --clean
 
testbench:
        ghdl -m $(TARGET)
        ghdl -r $(TARGET) $(DEBUG)
        gtkwave $(VCDFILE)
        $(CLEANUP)


Which is used in a terminal (providing you have gtkwave and ghdl installed) as follows:

$ make testbench TARGET=Chien_tb

Hoping to be useful, I’ll retire. I’ll be back in a few weeks with more details.